400Gb/s QSFP-DD SR8 100m Transceiver-Industrial Networking and Fiber Communication Experts

This product is a parallel 400Gb/s Quad Small Form Factor Pluggable--double density (QSFP-DD) optical module. It provides increased port density and total system cost savings. The QSFP-DD full- duplex optical module offers 8 independent transmit and receive channels, each capable of 53.125Gb/s operation for an aggregate data rate of 400Gb/s on 100 meters of OM3 multi-mode fiber. An optical fiber cable with an MTP/MPO-16 connector can be plugged into the QSFP-DD SR8 module receptacle. Proper alignment is ensured by the guide pins inside the receptacle. The cable usually cannot be twisted for proper channel to channel alignment. Electrical connection is achieved through an QSFP-DD MSA-compliant edge type connector. The central wavelengths of all the 8 parallel lanes are 850nm. It contains an optical MPO-16 connector for the optical interface and a 60-pin connector for the electrical interface. Host FEC is required to support up to 70m OM3 multi-mode fiber transmission. The product is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP-DD Multi-Source Agreement (MSA) Type 2. It has been designed to meet harshest external operating conditions including temperature, humidity and EMI interference.

Features
● QSFP-DD MSA compliant
● 8 parallel lanes on 850nm center wavelength
● Compliant to IEEE 802.3bs Specification
● Up to 100m transmission on multi-mode fiber (MMF) OM3 with FEC
● Operating case temperature: 0 to 70oC
● 8x53.125Gb/s electrical interface (400GAUI-8)
● Data Rate 53.125Gbps (PAM4) per channel.
● Maximum power consumption 12W
● MPO-16 connector
● RoHS compliant

Transceiver Block Diagram

Figure 1. Transceiver Block Diagram

Optical interface and Pin Assignment

The electrical pinout of the QSFP-DD module is shown as Figure 2. And Figure 3 shows the optical interface of MPO-16.

Figure 2. MSA Compliant Connector

Figure 3. MPO-16 Optical Connector Interface

Pin Definition

Pin	Logic	Symbol	Deion	Plug Sequence
1		GND	Ground	1B
2	CML-I	Tx2n	Transmitter Inverted Data Input	3B
3	CML-I	Tx2p	Transmitter Non-Inverted Data Input	3B
4		GND	Ground	1B
5	CML-I	Tx4n	Transmitter Inverted Data Input	3B
6	CML-I	Tx4p	Transmitter Non-Inverted Data Input	3B
7		GND	Ground	1B
8	LVTTL-I	ModSelL	Module Select	3B
9	LVTTL-I	ResetL	Module Reset	3B
10		VccRx	+3.3V Power Supply Receiver	2B
11	LVCMOS- I/O	SCL	2-wire serial interface clock	3B
12	LVCMOS- I/O	SDA	2-wire serial interface data	3B
13		GND	Ground	1B
14	CML-O	Rx3p	Receiver Non-Inverted Data Output	3B
15	CML-O	Rx3n	Receiver Inverted Data Output	3B
16	GND	Ground	1B
17	CML-O	Rx1p	Receiver Non-Inverted Data Output	3B
18	CML-O	Rx1n	Receiver Inverted Data Output	3B
19		GND	Ground	1B
20		GND	Ground	1B
21	CML-O	Rx2n	Receiver Inverted Data Output	3B
22	CML-O	Rx2p	Receiver Non-Inverted Data Output	3B
23		GND	Ground	1B
24	CML-O	Rx4n	Receiver Inverted Data Output	3B
25	CML-O	Rx4p	Receiver Non-Inverted Data Output	3B
26		GND	Ground	1B
27	LVTTL-O	ModPrsL	Module Present	3B
28	LVTTL-O	IntL	Interrupt	3B
29		VccTx	+3.3V Power supply transmitter	2B
30		Vcc1	+3.3V Power supply	2B
31	LVTTL-I	InitMode	Initialization mode; In legacy QSFP applications, the InitMode pad is called LPMODE	3B
32		GND	Ground	1B
33	CML-I	Tx3p	Transmitter Non-Inverted Data Input	3B
34	CML-I	Tx3n	Transmitter Inverted Data Input	3B
35		GND	Ground	1B
36	CML-I	Tx1p	Transmitter Non-Inverted Data Input	3B
37	CML-I	Tx1n	Transmitter Inverted Data Input	3B
38		GND	Ground	1B
39		GND	Ground	1A
40	CML-I	Tx6n	Transmitter Inverted Data Input	3A
41	CML-I	Tx6p	Transmitter Non-Inverted Data Input	3A
42		GND	Ground	1A
43	CML-I	Tx8n	Transmitter Inverted Data Input	3A
44	CML-I	Tx8p	Transmitter Non-Inverted Data Input	3A
45		GND	Ground	1A
46		Reserved	For future use	3A
47		VS1	Module Vendor Specific 1	3A
48		VccRx1	3.3V Power Supply	2A
49		VS2	Module Vendor Specific 2	3A
50		VS3	Module Vendor Specific 3	3A
51		GND	Ground	1A
52	CML-O	Rx7p	Receiver Non-Inverted Data Output	3A
53	CML-O	Rx7n	Receiver Inverted Data Output	3A
54		GND	Ground	1A
55	CML-O	Rx5p	Receiver Non-Inverted Data Output	3A
56	CML-O	Rx5n	Receiver Inverted Data Output	3A
57		GND	Ground	1A
58		GND	Ground	1A
59	CML-O	Rx6n	Receiver Inverted Data Output	3A
60	CML-O	Rx6p	Receiver Non-Inverted Data Output	3A
61		GND	Ground	1A
62	CML-O	Rx8n	Receiver Inverted Data Output	3A
63	CML-O	Rx8p	Receiver Non-Inverted Data Output	3A
64		GND	Ground	1A
65		NC	No Connect	3A
66		Reserved	For future use	3A
67		VccTx1	3.3V Power Supply	2A
68		Vcc2	3.3V Power Supply	2A
69		Reserved	For Future Use	3A
70		GND	Ground	1A
71	CML-I	Tx7p	Transmitter Non-Inverted Data Input	3A
72	CML-I	Tx7n	Transmitter Inverted Data Input	3A
73		GND	Ground	1A
74	CML-I	Tx5p	Transmitter Non-Inverted Data Input	3A
75	CML-I	Tx5n	Transmitter Inverted Data Input	3A
76		GND	Ground	1A

Recommended Power Supply Filter

Figure 4. Recommended Power Supply Filter

Absolute Maximum Ratings

It has to be noted that the operation in excess of any individual absolute maximum ratings might cause permanent damage to this module.

Parameter	Symbol	Min	Max	Units	Notes
Storage Temperature	TS	-40	85	degC
Operating Case Temperature	TOP	0	70	degC
Power Supply Voltage	VCC	-0.5	3.6	V
Relative Humidity (non-condensation)	RH	0	85	%

Recommended Operating Conditions and Power Supply Requirements

Parameter	Symbol	Min	Typical	Max	Units	Notes
Operating Case Temperature	TOP	0		70	degC
Power Supply Voltage	VCC	3.135	3.3	3.465	V
Data Rate, each Lane			26.5625		GBd	PAM4
Data Rate Accuracy		-100		100	ppm
Pre-FEC Bit Error Ratio				2.4x10-4
Post-FEC Bit Error Ratio				1x10-12		1
Link Distance with OM3	D	0.5		100	m	2

Notes:

1. FEC provided by host system.

2. FEC required on host system to support maximum distance.

Electrical Characteristics

The following electrical acteristics are defined over the Recommended Operating Environment unless otherwise specified.

Parameter

Test

Point

Min

Typical

Max

Units

Notes

Power Consumption

Supply Current

Icc

3.63

Transmitter (each Lane)

Signaling Rate, each Lane

TP1

26.5625 ± 100 ppm

GBd

Differential pk-pk Input Voltage Tolerance

TP1a

900

mVpp

Differential Termination Mismatch

TP1

Differential Input Return Loss

TP1

IEEE 802.3-

2015

Equation

(83E-5)

Differential to Common Mode Input Return Loss

TP1

IEEE 802.3-

2015

Equation

(83E-6)

Module Stressed Input Test

TP1a

See IEEE 802.3bs 120E.3.4.1

Single-ended Voltage Tolerance Range (Min)

TP1a

-0.4 to 3.3

DC Common Mode Input Voltage

TP1

-350

2850

Receiver (each Lane)

Signaling Rate, each lane

TP4

26.5625 ± 100 ppm

GBd

Differential Peak-to-Peak Output Voltage

TP4

900

mVpp

AC Common Mode Output Voltage, RMS

TP4

17.5

Differential Termination Mismatch

TP4

Differential Output Return Loss

TP4

IEEE 802.3-

2015

Equation

(83E-2)

Common to Differential Mode Conversion Return Loss

TP4

IEEE 802.3-

2015

Equation

(83E-3)

Transition Time, 20% to 80%

TP4

9.5

Near-end Eye Symmetry Mask

Width (ESMW)

TP4

0.265

Near-end Eye Height,

Differential

TP4

Far-end Eye Symmetry Mask

Width (ESMW)

TP4

0.2

Far-end Eye Height, Differential

TP4

Far-end Pre-cursor ISI Ratio

TP4

-4.5

2.5

Common Mode Output Voltage (Vcm)

TP4

-350

2850

Notes:

1. With the exception to IEEE 802.3bs 120E.3.1.2 that the pattern is PRBS31Q or scrambled idle.

2. Meets BER specified in IEEE 802.3bs 120E.1.1.

3. DC common mode voltage generated by the host. Specification includes effects of ground offset voltage.

Optical Characteristics

Parameter	Symbol	Min	Typical	Max	Units	Notes
Transmitter
Center Wavelength	λC	840	850	860	nm
Data Rate, each Lane		26.5625 ± 100 ppm			GBd
Modulation Format		PAM4
RMS Spectral Width	∆λrms			0.6	nm	Modulated
Average Launch Power, each Lane	PAVG	-6.5		4	dBm	1
Outer Optical Modulation Amplitude (OMAouter), each Lane	POMA	-4.5		3	dBm	2
Launch Power in OMAouter minus TDECQ, each Lane		-5.9			dB
Transmitter and Dispersion Eye Clouser for PAM4, each Lane	TDECQ			4.5	dB
Extinction Ratio	ER	3			dB
Optical Return Loss Tolerance	TOL			12	dB
Average Launch Power of OFF Transmitter, each Lane	Poff			-30	dBm
Encircled Flux		≥ 86% at 19 μm ≤ 30% at 4.5 μm
Receiver
Center Wavelength	λC	840	850	860	nm
Data Rate, each Lane		26.5625 ± 100 ppm			GBd
Modulation Format		PAM4
Damage Threshold, each Lane	THd	5			dBm	3
Average Receive Power, each Lane		-7.9		4	dBm	4
Receive Power (OMAouter), each Lane				3	dBm
Receiver Sensitivity (OMAouter), each Lane	SEN			-6.5	dBm	5
Stressed Receiver Sensitivity (OMAouter), each Lane	SRS			-3	dBm	6
Receiver Reflectance	RR			-12	dB
LOS Assert	LOSA	-30			dBm
LOS De-assert	LOSD			-12	dBm
LOS Hysteresis	LOSH	0.5			dB
Stressed Conditions for Stress Receiver Sensitivity (Note 7)
Stressed Eye Closure for PAM4 (SECQ), Lane under Test			4		dB
OMAouter of each Aggressor Lane			3		dBm

Notes:

1. Average launch power, each lane (min) is informative and not the principal indicator of signal strength.
A transmitter with launch power below this value cannot be compliant; however,
a value above this does not ensure compliance.

2. Even if the TDECQ < 1 dB, the OMAouter (min) must exceed the minimum value specified here.

3. The receiver shall be able to tolerate, without damage, continuous exposure to an optical input signal having this average power level.

4. Average receive power, each lane (min) is informative and not the principal indicator of signal strength. A received power below this value cannot be compliant;
however, a value above this does not ensure compliance.

5. Receiver Sensitivity OMAouter, each lane (max) is informative and is defined for a BER of 2.4x10-4.

6. Measured with conformance test signal at receiver input for the BER of 2.4x10-4.

7. These test conditions are for measuring stressed receiver sensitivity. They are not acteristics of the receiver.

Digital Diagnostic Functions

The following digital diagnostic acteristics are defined over the normal operating conditions unless otherwise specified.

Parameter	Symbol	Min	Max	Units	Notes
Temperature monitors absolute error	DMI_Temp	-3	3	degC	Over operating temperature range
Supply voltage monitor absolute error	DMI _VCC	-0.1	0.1	V	Over full operating range
Channel RX power monitor absolute error	DMI_RX_Ch	-2	2	dB	1
Channel Bias current monitor	DMI_Ibias_Ch	-10%	10%	mA
Channel TX power monitor absolute error	DMI_TX_Ch	-2	2	dB	1

Notes:

1. Due to measurement accuracy of different fibers, there could be an additional +/-1 dB fluctuation, or a +/- 3 dB total accuracy.

Outline Drawing (mm)

Applications
● Data Center Interconnect
● 400G Ethernet
● InfiniBand interconnects
● Enterprise networking

Ordering Information

Date	Version	Description	Download
2024-04-29	V1.0	Datasheet_400G QSFP-DD SR8 850nm 100m_LA-OT-400G-SR8.pdf	

Photo	Model	Description

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400Gb/s QSFP-DD SR8 100m Transceiver

LA-OT-400G-SR8

400Gb/s QSFP-DD SR8 100m Transceiver

LA-OT-400G-SR8

Optical Characteristics

#B2, Zhongbaotong Creative Park,Changfa West Road No.34 Bantian,Longgang District, Shenzhen, P.R.C., 518129

+86-755-84656994

sales@lanaotek.com

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